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? semiconductor components industries, llc, 2017 october, 2017 ? rev. 4 1 publication order number: ncv8537/d ncv8537 500 ma high accuracy low dropout linear regulator, with power good function the ncv8537 is a high performance low dropout linear voltage regulator. based on the popular ncv8535, the device retains all the best features of its predecessor which includes high accuracy, excellent stability, low noise performance and reverse bias protection but now includes a power good output signal to enable monitoring of the supply system. the device is available with fixed or adjustable outputs and is packaged in a 10 pin 3x3 mm dfn package. features ? high accuracy output over line and load variances ( 0.9% at 25 c) ? operating temperature range: ?40 c to 125 c ? power good output to indicate the regulator is within specified limits ? stable output with low value capacitors of any type and with no minimum load current requirement ? incorporates current limiting and reverse bias protection ? thermal shutdown protection ? low dropout voltage at full load (340 mv typ at v o = 3.3 v) ? low noise (33 vrms w/ 10 nf c nr and 52 vrms w/out c nr ) ? low shutdown current (< 1 ma) ? reverse bias protected ? 2.9 v to 12 v supply range ? available in 1.8 v, 2.5 v, 3.3 v, 5.0 v and adjustable output voltages ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec?q100 qualified and ppap capable ? these are pb?free devices applications ? networking systems, dsl/cable modems ? audio systems for automotive applications ? navigation systems ? satellite receivers this document contains information on some products that are still under development. on semiconductor reserves the right to change or discontinue these products without notice. see detailed ordering, marking and shipping information in the package dimensions section on page 15 of this data sheet. ordering information marking diagram www. onsemi.com xxx = specific device marking a = assembly location l = wafer lot y = year w = work week = pb?free package dfn10 mn suffix case 485c v8537 xxx alyw 1 pin 1, 2. v out 3. sense / adj 4. gnd 5. pwrg 6. nc 7. nr 8. sd 9, 10. v in ep, gnd (note: microdot may be in either location) pin configuration
ncv8537 www. onsemi.com 2 figure 1. typical fixed version application schematic v in v out c in 1.0 f c out 1.0 f out sense out in in nr 3 2 1 9 10 (optional) 54 + + 7 gnd c nr pwrg pwrg r1 100k on off sd nc 6 8 ep ep figure 2. typical adjustable version application schematic v in v out c in 1.0 f c out 1.0 f out adj out in in nr 3 2 1 9 10 54 + + 7 gnd c nr (optional) pwrg pwrg r1 100k on off sd nc 6 8 ep ep r2 r3
ncv8537 www. onsemi.com 3 figure 3. block diagram, adjustable output version current and thermal protection circuit series pass element with reverse bias protection error amplifier comp. voltage reference enable block pwrg vout adj vin sd nr gnd ncv8537 adjustable current and thermal protection circuit series pass element with reverse bias protection error amplifier comp. voltage reference enable block pwrg vout sense vin sd nr gnd ncv8537 fix figure 4. block diagram, fixed output version
ncv8537 www. onsemi.com 4 pin function description pin no. pin name description 1, 2 v out regulated output voltage. bypass to ground with c out 1.0 f 3 sense/adj for output voltage sensing, connect to pins 1 and 2.at fixed output voltage version adjustable pin at adjustable output version 4 gnd power supply ground 5 pwrg power good 6 nc not connected 7 nr noise reduction pin. this is an optional pin used to further reduce noise. 8 sd shutdown pin. when not in use, this pin should be connected to the input pin. 9, 10 v in power supply input voltage epad epad exposed thermal pad should be connected to ground. maximum ratings rating symbol value unit input voltage v in ?0.3 to +16 v output voltage v out ?0.3 to v in +0.3 or 10 v* v pwrg pin voltage v pwrg ?0.3 to +16 v shutdown pin voltage v sh ?0.3 to +16 v junction temperature range t j ?40 to +150 c storage temperature range t stg ?50 to +150 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. note: this device series contains esd protection and exceeds the following tests: human body model (hbm) tested per aec?q100?002 (eia/jesd22?a114) machine model (mm) tested per aec?q100?003 (eia/jesd22?a115) charged device model (cdm) tested per eia/jesd22?c101. *which ever is less. reverse bias protection feature valid only if (v out ? v in ) 7 v. thermal characteristics characteristic test conditions (typical value) unit min pad board (note 1) 1 pad board (note 1) junction?to?air, ja 215 66 c/w junction?to?pin, j?l4 58 18 c/w 1. as mounted on a 35 x 35 x 1.5 mm fr4 substrate, with a single layer of a specified copper area of 2 oz (0.07 mm thick) copper traces and heat spreading area. jedec 51 specifications for a low and high conductivity test board recommend a 2 oz copper thickness. t est cond itions are under natural convection or zero air flow.
ncv8537 www. onsemi.com 5 electrical characteristics ? 1.8 v (v out = 1.8 v typical, v in = 2.9 v, t a = ?40 c to +125 c, unless otherwise noted, note 2) characteristic symbol min typ max unit output voltage (accuracy) v in = 2.9 v to 5.8 v, i load = 0.1 ma to 500 ma, t a = 25 c v out ?0.9% 1.783 1.8 +0.9% 1.817 v output voltage (accuracy) v in = 2.9 v to 5.8 v, i load = 0.1 ma to 500 ma, t a = 0 c to +85 c v out ?1.4% 1.774 1.8 +1.4% 1.826 v output voltage (accuracy) v in = 2.9 v to 5.8 v, i load = 0.1 ma to 500 ma, t a = ?40 c to +125 c v out ?1.5% 1.773 1.8 +1.5% 1.827 v minimum input voltage v inmin 2.9 v line regulation v in = 2.9 v to 12 v, i load = 0.1 ma line reg 0.04 mv/v load regulation v in = 2.9 v, i load = 0.1 ma to 500 ma load reg 0.04 mv/ma dropout voltage (see figure 9) i load = 500 ma (notes 3, 4) i load = 300 ma (notes 3, 4) i load = 50 ma (notes 3, 4) v do 620 230 95 mv peak output current (see figures 14 and 17) i pk 500 700 830 ma short output current (see figure 14) v in < 7 v, t a = 25 c i sc 900 ma thermal shutdown / hysteresis t j 160/10 c ground current in regulation i load = 500 ma (note 3) i load = 300 ma (note 3) i load = 50 ma i load = 0.1 ma in dropout v in = 2.2 v, i load = 0.1 ma in shutdown v sd = 0 v i gnd i gndsh 9.0 4.6 0.8 ? 14 7.5 2.5 220 500 1.0 ma a a a output noise c nr = 0 nf, i load = 500 ma, f = 10 hz to 100 khz, c out = 10 f c nr = 10 nf, i load = 500 ma, f = 10 hz to 100 khz, c out = 10 f v noise 52 33 vrms vrms power good voltage low threshold hysteresis high threshold v elft 93 95 2 97 99 % of v out power good pin voltage saturation (i ef ? 1.0 ma) v efdo 200 mv power good pin leakage i efleak 1.0 a power good blanking time (note 7) t ef 50 s shutdown threshold voltage on threshold voltage off v sd 2.0 0.4 v v sd input current, v sd = 0 v to 0.4 v or v sd = 2.0 v to v in i sd 0.07 1.0 a output current in shutdown mode, v out = 0 v i osd 0.07 1.0 a reverse bias protection, current flowing from the output pin to gnd (v in = 0 v, v out_forced = 1.8 v) i outr 10 a 2. performance guaranteed over the operating temperature range by design and/or characterization, production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 3. t a must be greater than 0 c. 4. maximum dropout voltage is limited by minimum input voltage v in = 2.9 v recommended for guaranteed operation.
ncv8537 www. onsemi.com 6 electrical characteristics ? 2.5 v (v out = 2.5 v typical, v in = 2.9 v, t a = ?40 c to +125 c, unless otherwise noted, note 5) characteristic symbol min typ max unit output voltage (accuracy) v in = 2.9 v to 6.5 v, i load = 0.1 ma to 500 ma, t a = 25 c v out ?0.9% 2.477 2.5 +0.9% 2.523 v output voltage (accuracy) v in = 2.9 v to 6.5 v, i load = 0.1 ma to 500 ma, t a = 0 c to +85 c v out ?1.4% 2.465 2.5 +1.4% 2.535 v output voltage (accuracy) v in = 2.9 v to 6.5 v, i load = 0.1 ma to 500 ma, t a = ?40 c to +125 c v out ?1.5% 2.462 2.5 +1.5% 2.538 v minimum input voltage v inmin 2.9 v line regulation v in = 2.9 v to 12 v, i load = 0.1 ma line reg 0.04 mv/v load regulation v in = 2.9 v, i load = 0.1 ma to 500 ma load reg 0.04 mv/ma dropout voltage (see figure 10) i load = 500 ma (note 6) i load = 300 ma (note 6) i load = 50 ma i load = 0.1ma v do 340 230 110 10 mv peak output current (see figures 14 and 18) i pk 500 700 800 ma short output current (see figure 14) v in < 7 v, t a = 25 c i sc 900 ma thermal shutdown / hysteresis t j 160/10 c ground current in regulation i load = 500 ma (note 6) i load = 300 ma (note 6) i load = 50 ma i load = 0.1 ma in dropout v in = 2.4 v, i load = 0.1 ma in shutdown v sd = 0 v i gnd i gndsh 9.0 4.6 0.8 ? 14 7.5 2.5 220 500 1.0 ma a a a output noise c nr = 0 nf, i load = 500 ma, f = 10 hz to 100 khz, c out = 10 f c nr = 10 nf, i load = 500 ma, f = 10 hz to 100 khz, c out = 10 f v noise 56 35 vrms vrms power good voltage low threshold hysteresis high threshold v elft 93 95 2 97 99 % of v out power good pin voltage saturation (i ef ? 1.0 ma) v efdo 200 mv power good pin leakage i efleak 1.0 a power good blanking time (note 7) t ef 50 s shutdown threshold voltage on threshold voltage off v sd 2.0 0.4 v v s d input current, v sd = 0 v to 0.4 v or v sd = 2.0 v to v in i sd 0.07 1.0 a output current in shutdown mode, v out = 0 v i osd 0.07 1.0 a reverse bias protection, current flowing from the output pin to gnd (v in = 0 v, v out_forced = 2.5 v) i outr 10 a 5. performance guaranteed over the operating temperature range by design and/or characterization, production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 6. t a must be greater than 0 c. 7. can be disabled per customer request.
ncv8537 www. onsemi.com 7 electrical characteristics ? 3.3 v (v out = 3.3 v typical, v in = 3.7 v, t a = ?40 c to +125 c, unless otherwise noted, note 8) characteristic symbol min typ max unit output voltage (accuracy) v in v in = 3.7 v to 7.3 v, i load = 0.1 ma to 500 ma, t a = 25 c v out ?0.90% 3.27 3.3 0.90% 3.33 v output voltage (accuracy) v in = 3.7 v to 7.3 v, i load = 0.1 ma to 500 ma, t a = 0 c to +85 c v out ?1.40% 3.254 3.3 1.40% 3.346 v output voltage (accuracy) v in = 3.7 v to 7.3 v, i load = 0.1 ma to 500 ma, t a = ?40 c to +125 c v out ?1.50% 3.25 3.3 1.50% 3.35 v line regulation v in = 3.7 v to 12 v, i load = 0.1 ma line reg 0.04 mv/v load regulation v in = 3.7 v, i load = 0.1 ma to 500 ma load reg 0.04 mv/ma dropout voltage i load = 500 ma i load = 300 ma i load = 50 ma i load = 0.1 ma v do 340 230 110 10 mv peak output current (see figure 14) i pk 500 700 800 ma short output current (see figure 14) v in < 7 v, t a = 25 c i sc 900 ma thermal shutdown / hysteresis t j 160/10 c ground current in regulation i load = 500 ma (note 8) i load = 300 ma i load = 50 ma i load = 0.1 ma in dropout v in = 3.7 v, i load = 0.1 ma in shutdown v sd = 0 v i gnd i gndsh 9 4.6 0.8 ? 14 7.5 2.5 220 500 1 ma a a a output noise c nr = 0 nf, i load = 500 ma, f = 10 hz to 100 khz, c out = 10 f c nr = 10 nf, i load = 500 ma, f = 10 hz to 100 khz, c out = 10 f v noise 69 46 vrms power good voltage low threshold hysteresis high threshold v elft 93 95 2 97 99 % of v out power good pin voltage saturation (i ef = 1.0 ma) v efdo 200 mv power good pin leakage i efleak 1 a power good blanking time (note 9) t ef 50 s shutdown threshold voltage on threshold voltage off v sd 2 0.4 v sd input current, v sd = 0 v to 0.4 v or v sd = 2.0 v to v in i sd 0.07 1 a output current in shutdown mode, v out = 0 v i osd 0.07 1 a reverse bias protection, current flowing from the output pin to gnd (v in = 0 v, v out_forced = 3.3 v) i outr 10 a 8. performance guaranteed over the operating temperature range by design and/or characterization, production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 9. can be disabled per customer request.
ncv8537 www. onsemi.com 8 electrical characteristics ? 5 v (v out = 5.0 v typical, v in = 5.4 v, t a = ?40 c to +125 c, unless otherwise noted, note 10) characteristic symbol min typ max unit output voltage (accuracy) v in v in = 5.4 v to 7.3 v, i load = 0.1 ma to 500 ma, t a = 25 c v out ?0.90% 4.955 5 0.90% 5.045 v output voltage (accuracy) v in = 5.4 v to 7.3 v, i load = 0.1 ma to 500 ma, t a = 0 c to +85 c v out ?1.40% 4.93 5 1.40% 5.07 v output voltage (accuracy) v in = 5.4 v to 7.3 v, i load = 0.1 ma to 500 ma, t a = ?40 c to +125 c v out ?1.50% 4.925 5 1.50% 5.075 v line regulation v in = 5.4 v to 12 v, i load = 0.1 ma line reg 0.04 mv/v load regulation v in = 5.4 v, i load = 0.1 ma to 500 ma load reg 0.04 mv/ma dropout voltage i load = 500 ma i load = 300 ma i load = 50 ma i load = 0.1 ma v do 340 230 110 10 mv peak output current (see figure 14) i pk 500 700 830 ma short output current (see figure 14) v in < 7 v, t a = 25 c i sc 930 ma thermal shutdown / hysteresis t j 160/10 c ground current in regulation i load = 500 ma (note 10) i load = 300 ma i load = 50 ma i load = 0.1 ma in dropout v in = 3.2 v, i load = 0.1 ma in shutdown v sd = 0 v i gnd i gndsh 9 4.6 0.8 ? 14 7.5 2.5 220 500 1 ma a a a output noise c nr = 0 nf, i load = 500 ma, f = 10 hz to 100 khz, c out = 10 f c nr = 10 nf, i load = 500 ma, f = 10 hz to 100 khz, c out = 10 f v noise 93 58 vrms power good voltage low threshold hysteresis high threshold v elft 93 95 2 97 99 % of v out power good pin voltage saturation (i ef = 1.0 ma) v efdo 200 mv power good pin leakage i efleak 1 a power good blanking time (note 11) t ef 50 s shutdown threshold voltage on threshold voltage off v sd 2 0.4 v sd input current, v sd = 0 v to 0.4 v or v sd = 2.0 v to v in i sd 0.07 1 a output current in shutdown mode, v out = 0 v i osd 0.07 1 a reverse bias protection, current flowing from the output pin to gnd (v in = 0 v, v out_forced = 5 v) i outr 10 a 10. performance guaranteed over the operating temperature range by design and/or characterization, production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 11. can be disabled per customer request.
ncv8537 www. onsemi.com 9 electrical characteristics ? adjustable (v out = 1.25 v typical, v in = 2.9 v, t a = ?40 c to +125 c, unless otherwise noted, note 12) characteristic symbol min typ max unit reference voltage (accuracy) v in = 2.9 v to v out +4.0 v, i load = 0.1 ma to 500 ma, t a = 25 c v ref ?0.90% 1.239 1.25 0.90% 1.261 v reference voltage (accuracy) v in = 2.9 v to v out + 4.0 v, i load = 0.1 ma to 500 ma, t a = 0 c to +85 c v ref ?1.40% 1.233 1.25 1.40% 1.268 v reference voltage (accuracy) v in = 2.9 v to v out + 4.0 v, i load = 0.1 ma to 500 ma, t a = ?40 c to +125 c v ref ?1.50% 1.231 1.25 1.50% 1.269 v line regulation v in = 2.9 v to 12 v, i load = 0.1 ma line reg 0.04 mv/v load regulation v in = 2.9 v to 12 v, i load = 0.1 ma to 500 ma load reg 0.04 mv/ma dropout voltage (v out = 2.5 v ? 10 v) i load = 500 ma i load = 300 ma i load = 50 ma i load = 0.1 ma v do 340 230 110 10 mv peak output current (see figure 14) i pk 500 700 830 ma short output current (see figure 14) v in < 7 v, t a = 25 c v out 3.3 v v out > 3.3 v i sc 900 930 ma thermal shutdown / hysteresis t j 160/ 10 c ground current in regulation i load = 500 ma (note 12) i load = 300 ma i load = 50 ma i load = 0.1 ma in dropout vin = v out + 0.1 v or 2.9 v (whichever is higher), i load = 0.1 ma in shutdown v sd = 0 v i gnd i gndsh 9 4.6 0.8 14 7.5 2.5 220 500 1 ma a a a output noise c nr = 0 nf, i load = 500 ma, f = 10 hz to 100 khz, cout = 10 f c nr = 10 nf, i load = 500 ma, f = 10 hz to 100 khz, cout = 10 f v noise 69 46 v rms power good voltage low threshold hysteresis high threshold v elft 93 95 2 97 99 % of v out power good pin voltage saturation (i ef = 1.0 ma) v efdo 200 mv power good pin leakage i efleak 1 a power good pin blanking time (note 13) t ef 50 s shutdown threshold voltage on threshold voltage off v sd 2 0.4 v sd input current, v sd = 0 v to 0.4 v or v sd = 2.0 v to v in v in 5.4 v v in > 5.4 v i sd 0.07 1 5 a output current in shutdown mode, v out = 0 v i osd 0.07 1 a reverse bias protection, current flowing from the output pin to gnd (v in = 0 v, v out_forced = v out (nom) 7 v) i outr 1 a 12. performance guaranteed over the operating temperature range by design and/or characterization, production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 13. can be disabled per customer request.
ncv8537 www. onsemi.com 10 t a , temperature ( c) v out , output voltage (v) figure 5. output voltage vs. temperature 1.8 v version v out = 1.8 v t a , temperature ( c) v out , output voltage (v) figure 6. output voltage vs. temperature 2.5 v version v out = 2.5 v t a , temperature ( c) v out , output voltage (v) figure 7. output voltage vs. temperature 3.3 v version 50 ma 500 ma 300 ma t a , temperature ( c) v out , output voltage (v) figure 8. output voltage vs. temperature 5.0 v version 1.75 1.76 1.77 1.78 1.79 1.8 1.81 1.82 1.83 1.84 1.85 ?40 ?20 0 20 40 60 80 100 120 140 2.47 2.475 2.48 2.485 2.49 2.495 2.5 2.505 2.51 2.515 2.52 ?40 ?20 0 20 40 60 80 100 120 140 v do , dropout voltage (mv) t a , temperature ( c) figure 9. dropout voltage vs. temperature 1.8 v version 3.270 3.275 3.280 3.285 3.290 3.295 3.300 3.305 3.310 3.315 3.320 ?40 ?20 0 20 40 60 80 100 120 140 4.85 4.9 4.95 5 5.05 5.1 ?40 ?20 0 20 40 60 80 100 120 140 v out = 3.3 v v out = 5.0 v 0 100 200 300 400 500 600 700 800 900 0 20 40 60 80 100 120 140 0 50 100 150 200 250 300 350 400 0 20 40 60 80 100 120 140 v do , dropout voltage (mv) t a , temperature ( c) figure 10. dropout voltage vs. temperature 2.5 v version 50 ma 500 ma 300 ma v in = 2.9 v i out = 0 v in = 2.9 v i out = 0 v in = 5.4 v i out = 0 v in = 3.7 v i out = 0
ncv8537 www. onsemi.com 11 0 50 100 150 200 250 300 350 400 0 20 40 60 80 100 120 140 v do , dropout voltage (mv) t a , temperature ( c) figure 11. dropout voltage vs. temperature 3.3 v version 50 ma 500 ma 300 ma 0 50 100 150 200 250 300 350 0 20 40 60 80 100 120 140 v do , dropout voltage (mv) t a , temperature ( c) figure 12. dropout voltage vs. temperature 5.0 v version 50 ma 500 ma 300 ma 0 100 200 300 400 500 600 700 800 900 1000 0 20 40 60 80 100 120 140 i sc i pk t a , temperature ( c) i pk (ma), i sc (ma) figure 13. peak and short current vs. temperature i out (ma) (for specific values of i pk and i sc , please refer to figure 13) v out (v) figure 14. output voltage vs. output current i sc i pk 0.97 v out 0 2 4 6 8 10 12 0 20 40 60 80 100 120 140 t a , temperature ( c) i gnd , ground current (ma) figure 15. ground current vs. temperature 500 ma 300 ma 50 ma 0 2 4 6 8 10 12 0 0.1 0.2 0.3 0.4 0 .5 i out , output current (a) figure 16. ground current vs. output current i gnd , ground current (ma) v in = 2.9 v v out = 1.8 v v in = 2.9 v v out = 1.8 v v in = 2.9 v v out = 1.8 v t a = 25 c
ncv8537 www. onsemi.com 12 figure 17. output current capability for the 1.8 v version v in , input voltage (v) i out , output current (a) f, frequency (hz) psrr, ripple rejection (db) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 ?20 c ?40 c 0 c 25 c 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 2 .7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 figure 18. output current capability for the 2.5 v version v in , input voltage (v) i out , output current (a) ?20 c ?40 c 0 c 25 c 0 10 20 30 40 50 60 70 80 90 100 100 1k 10k 100k 1m i out = 0.25 a i out = 0.5 a i out = 50 ma 0 10 20 30 40 50 60 70 80 90 i out = 0.25 a i out = 0.5 a i out = 50 ma f, frequency (hz) psrr, ripple rejection (db) figure 20. psrr vs. frequency adjustable version figure 21. psrr vs. frequency 2.5 v version 0 100 200 300 400 500 600 10 100 1k 10k 100k 1m noise density (nv/ hz ) f, frequency (hz) figure 22. output noise density adjustable version c nr = 10 nf c nr = 0 nf 0 100 200 300 400 500 600 10 100 1k 10k 100k 1m c nr = 0 nf c nr = 10 nf noise density (nv/ hz ) f, frequency (hz) figure 23. output noise density 2.5 v version v in = 2.9 v v out = 1.8 v v in = 2.9 v v out = 2.5 v v in = 2.9 v +0.5 v pp modulation v out = 1.25 v t a = 25 c v in = 3.4 v +0.5 v pp modulation v out = 2.5 v t a = 25 c 100 1k 10k 100k 1m v in = 2.9 v v out = 2.5 v t a = 25 c v in = 2.9 v v out = 1.25 v t a = 25 c
ncv8537 www. onsemi.com 13 figure 24. power good activation figure 25. power good inactivation output current (ma) maximum esr ( ) figure 26. stability with esr vs. output current 0 5.0 10 15 500 400 300 200 100 0 unstable area stable area v in at data sheet test conditions, 25 c, 1 f capacitance 200 150 100 50 0 600 500 400 300 200 100 0 700 ja ( c/w) copper heat spreading area (mm 2 ) 1 oz cf 250 300 2 oz cf figure 27. dfn10 self?heating thermal characterstics as a function of copper area on the pcb note: typical characteristics were measured with the same conditions as electrical characteristics.
ncv8537 www. onsemi.com 14 applications information reverse bias protection reverse bias is a condition caused when the input voltage goes to zero, but the output voltage is kept high either by a large output capacitor or another source in the application which feeds the output pin. normally in a bipolar ldo all the current will flow from the output pin to input pin through the pn junction with limited current capability and with the potential to destroy the ic. due to an improved architecture, the ncv8537 can withstand up to 7.0 v on the output pin with virtually no current flowing from output pin to input pin, and only negligible amount of current (tens of a) flowing from the output pin to ground for infinite duration. input capacitor an input capacitor of at least 1.0 f, any type, is recommended to improve the transient response of the regulator and/or if the regulator is located more than a few inches from the power source. it will also reduce the circuit?s sensitivity to the input line impedance at high frequencies. the capacitor should be mounted with the shortest possible track length directly across the regular?s input terminals. output capacitor the ncv8537 remains stable with any type of capacitor as long as it fulfills its 1.0 f requirement. there are no constraints on the minimum esr and it will remain stable up to an esr of 5.0 . larger capacitor values will improve the noise rejection and load transient response. noise reduction pin output noise can be greatly reduced by connecting a 10 nf capacitor (c nr ) between the noise reduction pin and ground (see figure 1). in applications where very low noise is not required, the noise reduction pin can be left unconnected. dropout voltage the voltage dropout is measured at 97% of the nominal output voltage. thermal considerations internal thermal limiting circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. this feature provides protection from a catastrophic device failure due to accidental overheating. this protection feature is not intended to be used as a substitute to heat sinking. the maximum power that can be dissipated, can be calculated with the equation below: p d t j(max) t a r ja (eq. 1) for improved thermal performance, contact the factory for the dfn package option. the dfn package includes an exposed metal pad that is specifically designed to reduce the junction to air thermal resistance, r ja . adjustable operation the output voltage can be set by using a resistor divider as shown in figure 2 with a range of 1.25 to 10 v. the appropriate resistor divider can be found by solving the equation below. the recommended current through the resistor divider is from 10 a to 100 a. this can be accomplished by selecting resistors in the k range. as result, the i adj * r2 becomes negligible in the equation and can be ignored. v out 1.25 * (1 r3 r2) i adj *r2 (eq. 2) power good operation the power good pin on the ncv8537 will produce a logic low when it drops below the nominal output voltage. refer to the electrical characteristics for the threshold values at which point the power good goes low. when the ncv8537 is above the nominal output voltage, the power good will remain at logic high. the external pullup resistor needs to be connected between v in and the power good pin. a resistor of approximately 100 k is recommended to minimize the current consumption. no pullup resistor is required if the power good output is not being used. the power good does not function during thermal shutdown and when the part is disabled.
ncv8537 www. onsemi.com 15 ordering information device* voltage option marking package package shipping ? ncv8537mn180r2g 1.8 v v8537 180 dfn10 (pb?free) non?w ettable flank 3000 / tape & reel ncv8537mn250r2g 2.5 v v8537 250 NCV8537MN330R2G 3.3 v v8537 330 ncv8537mn500r2g 5.0 v v8537 500 ncv8537mnadjr2g adj v8537 adj ncv8537ml180r2g** 1.8 v l8537 180 dfn10 (pb?free) wettable flank slp process 3000 / tape & reel ncv8537ml250r2g** 2.5 v l8537 250 ncv8537ml330r2g** 3.3 v l8537 330 ncv8537ml500r2g** 5.0 v l8537 500 ncv8537mladjr2g** adj l8537 adj ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *ncv prefix for automotive and other applications requiring unique site and control change requirements; aec?q100 qualified and ppap capable. **in development.
ncv8537 www. onsemi.com 16 package dimensions dfn10, 3x3, 0.5p case 485c issue e ??? ??? ??? 10x seating plane l d e 0.15 c a a1 e d2 e2 b 15 10 6 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. 5. terminal b may have mold compound material along side edge. mold flashing may not exceed 30 microns onto bottom surface of terminal b. 6. for device opn containing w option, detail a and b alternate construction are not applicable. wet- table flank construction is detail b as shown on side view of package. b a 0.15 c top view side view bottom view pin one reference 0.10 c 0.08 c (a3) c 10x 10x 0.10 c 0.05 c a b note 3 k dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.18 0.30 d 3.00 bsc d2 2.40 2.60 e 3.00 bsc e2 1.70 1.90 e 0.50 bsc l 0.35 0.45 l1 0.00 0.03 detail a k 0.19 typ 2x 2x detail b *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* ?? ?? ?? 2.64 1.90 0.50 0.55 10x 3.30 0.30 10x dimensions: millimeters pitch package outline l1 detail a l alternate terminal constructions l alternate b?2 alternate b?1 alternate a?2 alternate a?1 detail b wettable flank option construction a1 a3 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ncv8537/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?

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